Research on FPGA Signal Interception Strategy

In the FPGA, as the level of signal processing is deepened, after the signal is multiplied, accumulated, filtered, etc., the signal that is only 8 bits wide when input may be expanded to tens of bits, and the bit width is wider, occupying The more hardware resources, but after the bit width exceeds a certain range, the widening of the bit width does not significantly improve the processing accuracy. In this case, the signal needs to be truncated. Children's shoes that have written FPGA HDL code should know that truncation is the most common operation.

In general, the truncation only needs to cut off the lower digits. This is the easiest way to do it; for unsigned numbers, there is no problem with this; of course, there is also a rounding truncation method, which is to add one to the next lower digit. Then carry out the interception.

The following three truncation truncation are discussed: 1) direct truncation; 2) negative 1 truncation plus 1; 3) negative absolute value followed by truncation. Simulate the FPGA truncation process in matlab, run the following program to get four images.

a=10000*randn(1,1000);
%%
% intercept mode one: direct intercept
%%
b=floor(a/2^5);% truncates the lower 5 digits
Afft=fft(a);bfft=fft(b);
Figure;% observe the spectrum of the original signal and the truncated signal
Subplot(2,1,1);plot(abs(afft)/max(abs(afft)));grid;TItle('original signal');
Subplot(2,1,2);plot(abs(bfft)/max(abs(bfft)));grid;TItle('intercept signal');
%%
b=floor(a/2^12);% truncates the lower 12 bits
Afft=fft(a);bfft=fft(b);
Figure;% observe the spectrum of the original signal and the truncated signal
Subplot(2,1,1);plot(abs(afft)/max(abs(afft)));grid;TItle('original signal');
Subplot(2,1,2);plot(abs(bfft)/max(abs(bfft)));grid;TItle('intercept signal');
Figure;
%%
% intercept mode 2: add 1 after the negative intercept
%%
b=zeros(1,length(a));
For ii=1:length(a)
If a(ii)<0
b(ii)=floor(a(ii)/2^12)+1;% truncates the lower 12 bits and adds 1
Else
b(ii)=floor(a(ii)/2^12);% direct truncation
End
End
Afft=fft(a);bfft=fft(b);
Figure;% observe the spectrum of the original signal and the truncated signal
Subplot(2,1,1);plot(abs(afft)/max(abs(afft)));grid;title('original signal');
Subplot(2,1,2);plot(abs(bfft)/max(abs(bfft)));grid;title('intercept signal');
%%
% intercept mode three: negative value after taking the absolute value and then truncated
%%
b=zeros(1,length(a));
For ii=1:length(a)
If a(ii)<0
b(ii)=-floor(-a(ii)/2^12); % negative takes the absolute value and then truncates the lower 12 bits and then changes back to the original symbol
Else
b(ii)=floor(a(ii)/2^12);% direct truncation
End
End
Afft=fft(a);bfft=fft(b);
Figure;% observe the spectrum of the original signal and the truncated signal
Subplot(2,1,1);plot(abs(afft)/max(abs(afft)));grid;title('original signal');
Subplot(2,1,2);plot(abs(bfft)/max(abs(bfft)));grid;title('intercept signal');

Figure 1: Directly cut off the lower five

Figure 1: Directly cut off the lower five

Figure 2: Directly cut off the lower 12 bits

Figure 2: Directly cut off the lower 12 bits

Figure 3: Cut off the lower 12 bits and add a negative after the negative

Figure 3: Cut off the lower 12 bits and add a negative after the negative

Figure 4: Truncate the lower 12 bits and take the negative value and then intercept it. After the block is completed, the original symbol is changed back to the original symbol.

Figure 4: Truncate the lower 12 bits and take the negative value and then intercept it. After the block is completed, the original symbol is changed back to the original symbol.

It can be seen from Fig. 3 and Fig. 4 that after adopting the second and third interception strategies, the DC component disappears.

In fact, the third interception strategy achieves the effect that a pair of opposite numbers is still a pair of opposite numbers after the truncation. This effect is not achievable for odd numbers in the case of direct truncation.

In fact, the direct interception of the DC component can be intuitively recognized: from the matlab program, it can be seen that for FPGA signal truncation, it is actually rounded down; for signed numbers, positive Rounding down on the number axis is closer to the origin zero, then rounding down the negative number is away from the origin zero. This is because the negative number is represented in complement form, and the unsigned number corresponding to its complement is truncated. When the zero point is approached to the origin, when it is converted to a signed negative number, it is zero away from the origin. Therefore, the actual effect of the truncation is that the signal is shifted to the negative infinity direction. That is, for a white noise sequence, the original mean value is zero, and the mean value becomes a negative number after the truncation.

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