The role of NMI function of Kinetis series MCU and disable resolution

NMI (non-maskable interrupt): Non-maskable interrupt. It can be easily seen from its name that after the NMI interrupt function is turned on, the interrupt cannot be blocked by a switch interrupt.

Non-maskable interrupts (NMIs) are one type of interrupt request. The external non-maskable interrupt request informs the CPU of a catastrophic event, such as a power failure, a bus parity error, etc. via a dedicated CPU pin NMI. The internal non-maskable interrupt request is generated spontaneously by the CPU, such as memory read/write error, overflow interrupt, and division error interrupt. NMI line interrupt requests are not maskable (cannot be disabled) and are immediately latched by the CPU.

Here we mainly introduce the NMI function of Kinetis series MCU. The NMI function of Freescale Kinetis series MCU is started by default, and the NMI pin is also NMI function by default, so if you do not do any processing on NMI function and NMI pin, NMI The low level of the pin will enter the NMI interrupt.

The following describes how the K Series MCU disables the NMI function.

The K series MCU has a flash option register (FOPT). The NMI_DIS bit of the FOPT controls the enabling and disabling of the NMI function. (The FOPT of the K60P144M150SF3 does not have the NMI_DIS bit, so the NMI function cannot be turned off. The NMI pin can only be initialized at the beginning of the program. Other features to prevent entry into the NMI interrupt), the NMI_DIS bit defaults to 1, and the NMI function is enabled. The FOPT register is read-only. It automatically loads the configuration at address 0x40D in the flash configuration domain each time it is powered up, so we manage the NMI function by modifying the configuration of the flash configuration domain.

The description of the flash configuration field is shown below.

The description of the FOPT register of the K20 series MCU is shown in the figure below. For details, see the FOPT boot options section of the Boot section of the Reset and Boot chapter of the corresponding MCU reference manual.

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